june 21, 2013 | final | v1.09 1 digital multi-phase buck controller ir3536/38 chl8326/28 features ? 6-phase & 8-phase dual output pwm controller ? phases are flexibly assigned between loops 1 & 2 ? intel? vr12, amd? 3.4mhz svi/pvi & memory modes ? overclocking & gaming mode with vmax setting ? switching frequency from 200khz to 1.2mhz per phase ? ir efficiency shaping features including variable gate drive and dynamic phase control ? programmable 1-phase or 2-phase for light loads and active diode emulation for very light loads ? ir adaptive transient algorithm (ata) on both loops minimizes output bulk capacitors and system cost ? auto-phase detection with auto-compensation ? per-loop fault protection: ovp, uvp, ocp, otp, cfp ? i2c/smbus/pmbus system interface for telemetry of temperature, voltage, current & power for both loops ? non -volatile memory (nvm) for custom configuration ? compatible with ir atl and 3.3v t ri -state drivers ? +3.3v supply voltage; -20oc to 85oc ambient operation ? pb -free, rohs, 7x7 48-pin & 8x8 56-pin qfn , msl2 package applications ? intel ? vr12 & amd? svi & pvi based systems ? ddr memory with vtt tracking ? overclocked & gaming platforms pin diagram 49 gnd chl8326 48 pin 7x7 qfn top view 1 2 7 8 5 6 3 4 10 9 12 11 36 35 30 29 32 31 34 33 27 28 25 26 47 43 45 40 46 42 44 39 41 48 38 37 14 18 16 21 15 19 17 22 20 13 23 24 smb_dio pwm5 isen6 enable vrtn rcsm isen5 isen4 isen3 pwm6 vsen smb_clk pwm4 vr_ready 1 / pwrgd 2 irtn3irtn4 irtn6 irtn5 rcsp tsen vr_hot# 1 / vrhot_icrit# 2 pwm3 vinsen smb_alert# v18a rres vcc isen2 isen1 irtn1irtn2 pwm2pwm1 gpo_a 1 / cbout 2 rcsm_l2 rcsp_l2 sv_addr_gpo_d 1 / vid[1] 2 cfp 1 / vfixen_psi 2 pm_addr_gpo_c 1 / pm_addr_vid[0] 2 sv_dio 1 / svd_vid[2] 2 sv_clk 1 / svc_vid[3] 2 sv_alert 1 / vid[4] 2 vr_ready_l2 1 / pwrok 2 vcc psi 1 / vid[5] 2 var_gate vrtn_l2 vsen_l2 figure 1: ir3536/chl8326 package top view description the ir3536/chl8326 and ir3538/chl8328 are dual-loop digital multi-phase buck controllers. the ir3536/chl8326 drive up to 6 phases and the ir3538/chl8328 drives up to 8 phases. the ir3536/chl8326 and ir3538/chl8328 are fully intel? vr12 and amd? svi/pvi compliant on both loops and provide a vtt tracking function for ddr memory. the ir3536/chl8326 and ir3538/chl8328 include the ir efficiency shaping technology to deliver exceptional efficiency at minimum cost across the entire load range. ir variable gate drive optimizes the mosfet gate drive voltage based on real-time load current. ir dynamic phase control adds/drops phases based upon load current. the ir3536/chl8326 and ir3538/chl8328 can be configured to enter 1-phase operation and active diode emulation mode automatically or by command. is unique adaptive transient algorithm (ata), based on proprietary non-linear digital pwm algorithms, minimize s output bulk capacitors. the i2c/pmbus interface can communicate with up to 16 ir3536/chl8326 and ir3538/chl8328 based vr loops. device configuration and fault parameters are easily defined using the ir intuitive power designer (dpdc) gui and stored in on -chip nvm. the ir3536/chl8326 and ir3538/chl8328 provides extensive ovp, uvp, ocp and otp fault protection and includes thermistor based temperature sensing with vr_hot signal. nvm storage saves pins and enables a small package size. the ir3536/chl8326 a nd ir3538/chl8328 also include numerous features like register diagnostics for fast design cycles and platform differentiation, truly simplifying vrd design and enabling fastest time- to -market with its set -and- foget ethodolog . smb_dio pwm5 isen6 enable vrtn rcsm isen5 isen4 isen3 pwm6 vsen smb_clk pwm4 vr_ready 1 / pwrgd 2 irtn3 irtn4 irtn6 irtn5 rcsp tsen vr_hot# 1 / vrhot_icrit# 2 pwm3 vinsen smb_alert# v18a rres vcc isen2 isen1 irtn1 irtn2 pwm2pwm1 gpo_a 1 / cbout 2 rcsm_l2 rcsp_l2 sv_addr_gpo_d 1 / vid[1] 2 cfp 1 / vfixen_psi 2 pm_addr_gpo_c 1 / pm_addr_vid[0] 2 sv_dio 1 / svd_vid[2] 2 sv_clk 1 / svc_vid[3] 2 sv_alert 1 / vid[4] 2 vr_ready_l2 1 / pwrok 2 vcc psi(mpol) 1 / vid[5] 2 pwm7 vrtn_l2 vsen_l2 57 gnd chl8328 56 pin 8x8 qfn top view 55 51 53 48 54 50 52 47 49 56 46 45 43 44 1 2 7 8 5 6 3 4 10 9 12 11 14 13 16 20 18 23 17 21 19 24 22 15 25 26 28 27 42 41 36 35 38 37 40 39 33 34 31 32 29 30 isen8 gpo_b tsen2 var_gate pwm8 isen7 irtn7 irtn8 1 intel/mpol mode 2 amd mode figure 2: ir3538/ ch l8328 package top view downloaded from: http:///
june 21, 2013 | final | v1.09 2 digital multi-phase buck controller ir3536/38 chl8326/28 ordering information ir353 ? m ? ? ? ? ? ? ? ? ? chl832 ? D ? ? ? ? ? 49 gnd chl8326 48 pin 7x7 qfn top view 1 2 7 8 5 6 3 4 10 9 12 11 36 35 30 29 32 31 34 33 27 28 25 26 47 43 45 40 46 42 44 39 41 48 38 37 14 18 16 21 15 19 17 22 20 13 23 24 smb_dio pwm5 isen6 enable vrtn rcsm isen5 isen4 isen3 pwm6 vsen smb_clk pwm4 vr_ready 1 / pwrgd 2 irtn3 irtn4 irtn6 irtn5 rcsp tsen vr_hot# 1 / vrhot_icrit# 2 pwm3 vinsen smb_alert# v18a rres vcc isen2 isen1 irtn1 irtn2 pwm2 pwm1 gpo_a 1 / cbout 2 rcsm_l2 rcsp_l2 sv_addr_gpo_d 1 / vid[1] 2 cfp 1 / vfixen_psi 2 pm_addr_gpo_c 1 / pm_addr_vid[0] 2 sv_dio 1 / svd_vid[2] 2 sv_clk 1 / svc_vid[3] 2 sv_alert 1 / vid[4] 2 vr_ready_l2 1 / pwrok 2 vcc psi 1 / vid[5] 2 var_gate vrtn_l2 vsen_l2 figure 3: ir3536/chl8326 package top view, enlarged package packing qty part number programming qfn tr=3000 ty=2600 ir3536mtrpbf ir3536 mt ypbf default qfn tr=3000 ty=2600 ir3538mtrpbf ir3538 mt ypbf default qfn tr= 3000 ir353 6m xxyytrp 1 customer configuration qfn tr= 3000 ir3538mxxyytrp 1 customer configuration notes: 1. customer specific configuration file, where xx = customer id and yy = configuration file (codes assigned by ir marketing). package packing qty part number qfn t=3000 ty=2600 CHL8326-00CRT CHL8326-00CRTy qfn t=3000 chl8326-xxcrt 1 qfn t=3000 ty=2600 chl8328-00crt chl8328-00crty qfn t=3000 chl8328-xxcrt 1 notes: 1. indicates a customer specific configuration file. smb_dio pwm5 isen6 enable vrtn rcsm isen5 isen4 isen3 pwm6 vsen smb_clk pwm4 vr_ready 1 / pwrgd 2 irtn3 irtn4 irtn6 irtn5 rcsp tsen vr_hot# 1 / vrhot_icrit# 2 pwm3 vinsen smb_alert# v18a rres vcc isen2 isen1 irtn1 irtn2 pwm2 pwm1 gpo_a 1 / cbout 2 rcsm_l2 rcsp_l2 sv_addr_gpo_d 1 / vid[1] 2 cfp 1 / vfixen_psi 2 pm_addr_gpo_c 1 / pm_addr_vid[0] 2 sv_dio 1 / svd_vid[2] 2 sv_clk 1 / svc_vid[3] 2 sv_alert 1 / vid[4] 2 vr_ready_l2 1 / pwrok 2 vcc psi(mpol) 1 / vid[5] 2 pwm7 vrtn_l2 vsen_l2 57 gnd chl8328 56 pin 8x8 qfn top view 55 51 53 48 54 50 52 47 49 56 46 45 43 44 1 2 7 8 5 6 3 4 10 9 12 11 14 13 16 20 18 23 17 21 19 24 22 15 25 26 28 27 42 41 36 35 38 37 40 39 33 34 31 32 29 30 isen8 gpo_b tsen2 var_gate pwm8 isen7 irtn7 irtn8 1 intel/mpol mode 2 amd mode figure 4: ir3538/chl8328 package top view, enlarged t C tape & reel / ty - tray r C package type (qfn) c C operating temperature, commercial xx C configuration file part C 6 : chl8326 8 : chl8328 p/pbf C lead free tr C tape & reel / ty - tray yy C configuration file id xx C customer id package type (qfn) part C 6 : ir3536 8 : ir3538 downloaded from: http:///
june 21, 2013 | final | v1.09 3 digital multi-phase buck controller ir3536/38 chl8326/28 functional block diagram isen1 irtn1 isenx irtnx iseny irtny isenz irtnz tsen vinsen voltage adc vsen vrtn control and monitoring vout1_error vout2_error pwm1 pwm2 pwm3 pwm4 pwm5 reference, oscillator, state control, interfaces, registers and nvm sv_clk 1 /svc_vid[3] 2 adc clocks mux clocks phase_period_1 phase_period_2 v3_3 iout vin temp fault bus system clock iout vin temp vout fault bus system clock vid_1 vid_2 current adc itot_1 itot_2 ip1 ipx ipy ip1 ip6 ip7 ip8 mode control ipz var_gate ldo vcc 1.8v v18a sv_dio 1 /svd_vid[2] 2 smb_alert vr_hot# 1 / vrhot_icrit# 2 vr_ready 1 /pwrgd 2 vr_ready_l2 1 / pwrok 2 phase_ period_1 phase_ period_2 rres rcsp rscm afe_1 vid_1 smb_dio smb_clk sv_addr 1 /vid[1] 2 cfp 1 /vfixen_psi 2 pm_addr 1 / pm_addr_vid[0] 2 psi 1 /vid[5] 2 en pwm6 pwm7 pwm8 only for chl8328 pwm generator .. . .. . .. . .. . .. . .. . .. . . . . only for chl8328 chl8326 chl8328 x 3 4 y 4 5 z 6 8 sv_alert# 1 /vid[4] 2 gpo_a gpo_b only for chl8328 1 intel/mpol mode 2 amd mode tsen2 vsen_l2 vrtn_l2 rcsp_l2 rscm_l2 afe_2 vid_2 itot_2 monitor adc figure 5: ir3536/chl8326 and chl8328 functional block dia gram ir3538/chl8328 ir3538/chl8328 ir3538/ ir3536/ ir3538/ chl8326 chl8328 downloaded from: http:///
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